发明名称 |
Validation of electrical performance of an electronic package prior to fabrication |
摘要 |
An electrical resistance determination method. Input to the method includes a description of at least one electrical network within a substrate. The description includes specification of a plurality of first ports on a first side of the substrate, and a plurality of second ports on a second side of the substrate, for each electrical network. All of the first ports are electrically isolated from one another. All of the second ports are electrically connected to a common voltage. A computer readable program code, which is executed by a processor of a computer system computes for a first electrical network of the at least one electrical network an electrical resistance between each first port and a port of the second ports. The computer code may also display a perspective plot of the computed electrical resistances as a bar oriented about normal to each first port.
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申请公布号 |
US2005114050(A1) |
申请公布日期 |
2005.05.26 |
申请号 |
US20030721966 |
申请日期 |
2003.11.25 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BUDELL TIMOTHY W.;BUFFET PATRICK H.;LUSSIER CRAIG P. |
分类号 |
G01R31/04;G01R31/28;G06F3/06;G06F11/00;G06F11/14;G06F11/20;G06F12/00;G06F12/08;G06F13/00;G06F19/00;(IPC1-7):G06F19/00 |
主分类号 |
G01R31/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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