发明名称 Texture processor
摘要 A memory write section 2 writes texture data in a number capable of being transferred at a time and written in one address, in one of first through fourth texture memories 1a through 1d in common by single write operation. If the V coordinate of texture data to be written is an even number, the texture data is written in the first, second, third and fourth texture memories 1a, 1b, 1c and 1d in this order. If the V coordinate is an odd number, the data is written in the third, fourth, first and second texture memories 1c, 1d, 1a and 1b in this order. <IMAGE>
申请公布号 EP1533752(A2) 申请公布日期 2005.05.25
申请号 EP20040026216 申请日期 2004.11.04
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 SHIGENAGA, SATOSHI
分类号 G06T1/60;G06T15/04;(IPC1-7):G06T15/20 主分类号 G06T1/60
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