发明名称 Cu capping layer deposition with improved integrated circuit reliability
摘要 The electromigration resistance of nitride capped Cu lines is significantly improved by controlling the nitride deposition conditions to reduce the compressive stress of the deposited nitride layer, thereby reducing diffusion along the Cu-nitride interface. Embodiments include depositing a silicon nitride capping layer on inlaid Cu using dual frequency powers, holding the high frequency power constant and controlling the compressive stress of the deposited silicon nitride capping layer by varying the low frequency power to the susceptor, thereby enabling reduction of the compressive stress below about 2x10<SUP>7 </SUP>Pascals. Embodiments also include sequentially and contiguously treating the exposed planarized surface of in-laid Cu with a soft plasma containing NH<SUB>3 </SUB>diluted with N<SUB>2</SUB>, and then depositing the silicon nitride capping layer by plasma enhanced chemical vapor deposition, while varying the low frequency power between about 100 to about 300 watts. Embodiments also include Cu dual damascene structures formed in dielectric material having a dielectric constant (k) less than about 3.9.
申请公布号 US6897144(B1) 申请公布日期 2005.05.24
申请号 US20020100915 申请日期 2002.03.20
申请人 ADVANCED MICRO DEVICES, INC. 发明人 NGO MINH VAN;BESSER PAUL RAYMOND;ZHAO LARRY
分类号 H01L21/4763;H01L21/768;(IPC1-7):H01L21/476 主分类号 H01L21/4763
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