发明名称 |
Methods, apparatus and computer program products for modeling integrated circuit devices having reduced linewidths |
摘要 |
Methods, apparatus and computer program products for modeling integrated circuits having dense devices therein that experience linewidth (e.g., gate electrodes) reductions during fabrication are provided. For dense devices having electrical paths therein and first and second gate electrodes that overlie the electrical path, operations include determining an electrical gate length of the first gate electrode by evaluating a change in current through the electrical path relative to a change in gate length of the second gate electrode. The operation to determine the electrical gate length of the first gate electrode includes evaluating a change in simulated drain-to-source current through the electrical path relative to a change in the electrical gate length of the second gate electrode.
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申请公布号 |
US6898561(B1) |
申请公布日期 |
2005.05.24 |
申请号 |
US19990465433 |
申请日期 |
1999.12.21 |
申请人 |
INTEGRATED DEVICE TECHNOLOGY, INC. |
发明人 |
LIU CHUNBO;MA ZHIJIAN;CHOI JEONG YEOL |
分类号 |
G06F17/50;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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