发明名称 |
Integrated circuit with reverse engineering protection |
摘要 |
Technique and structures for camouflaging an integrated circuit structure. The integrated circuit structure is formed by a plurality of layers of material having controlled outlines and controlled thicknesses. A layer of dielectric material of a controlled thickness is disposed among said plurality of layers to thereby render the integrated circuit structure intentionally inoperable.
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申请公布号 |
US6897535(B2) |
申请公布日期 |
2005.05.24 |
申请号 |
US20030438689 |
申请日期 |
2003.05.14 |
申请人 |
HRL LABORATORIES, LLC;RAYTHEON CO |
发明人 |
CHOW LAP-WAI;CLARK, JR. WILLIAM M.;BAUKUS JAMES P. |
分类号 |
H01L23/58;H01L27/02;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 |
主分类号 |
H01L23/58 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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