发明名称 PROBING TEST METHOD OF SEMICONDUCTOR CHIPS
摘要 PROBLEM TO BE SOLVED: To provide a probing test method of semiconductor chips of which two or more terminals are respectively formed at equal intervals along with two opposing sides, by using one probe card, without requiring two adjoined semiconductor chips to be measured as a set. SOLUTION: An arrangement space P<SB>1</SB>of a first terminal 21 (terminal on the side of one side 11) is made one half of the width W<SB>2</SB>of a second terminal 22 (terminal on the side of the other side 12). An arrangement space K<SB>1</SB>of a probe 31 for the first terminal 21 is made twice the arrangement space P<SB>1</SB>of the first terminal 21. An arrangement space K<SB>2</SB>of a probe 32 for the second terminal 22 is made the same as with the arrangement space P<SB>2</SB>of the second terminal 22. In the probing test at the first time, the probes 31, 32 are made to come into contact with a first terminal 21a of odd number terminals and all the second terminals 22. In the probing test at the second time, a semiconductor chip 1 is moved in the width direction of the first terminal 21 only by the arrangement space P<SB>1</SB>of the first terminal 21, so that the probe 31 is made to touch a first terminal 21b of even numbered terminals. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005127903(A) 申请公布日期 2005.05.19
申请号 JP20030364734 申请日期 2003.10.24
申请人 SEIKO EPSON CORP 发明人 MURAYAMA YOSHIHIRO
分类号 G01R31/26;G01R1/073;H01L21/66;(IPC1-7):G01R31/26 主分类号 G01R31/26
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