发明名称 |
MEMORY DEVICE WITH PROGRAMMABLE RECEIVERS TO IMPROVE PERFORMANCE |
摘要 |
A memory system having a plurality of DRAMs which are selectively provided non-inverted or inverted signals. The DRAMs have the ability to accept non-inverted or inverted address/command signals from a register that drives a plurality of signals simultaneously. The system includes DRAM receivers with programmable input polarity and a register with programmable output polarity.
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申请公布号 |
US2005108468(A1) |
申请公布日期 |
2005.05.19 |
申请号 |
US20030707053 |
申请日期 |
2003.11.18 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HAZELZET BRUCE G.;KELLOGG MARK W.;RANKIN DARCIE J. |
分类号 |
G06F12/00;G06F12/16;G11C11/401;G11C11/4063;(IPC1-7):G06F12/16 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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