Light clock generating circuit and optical disk unit

摘要

A write clock generation circuit is provided that can detect wobble signal in high accuracy and can appropriately generate write clock with only small jitter even when the operation is switched from reproduction to recording. The wobble signal is obtained by changing stepwise the gain of a variable gain amp in the rear stage of a divided photo detector using a gain control circuit in a predetermined time period just after the beginning of recording. The write clock signal is generated using the above wobble signal. According to this arrangements, the change in wobble signal just before and after the beginning of recording can be reduced, and the gain change of a wobble signal amplitude regulation AGC is made slow. As a result, high frequency deviation of the wobble signal can be reduced even when the operation is switched from reproduction to recording, and the write clock with only small jitter can be generated.