| 摘要 |
A first layer of a first conductivity type is formed in a partial surface layer of an active region of a semiconductor substrate. A buried layer of a second conductivity type is disposed being partially superposed upon the first layer as viewed in plan. The buried layer is deeper than the first layer, and the upper surface of the buried layer is set to a position deeper than the bottom of a device isolation insulating region. A MISFET is formed in a region of the active region where the first layer is not formed. The bottoms of first and second impurity concentration regions corresponding to the source and drain of MISFET are disposed at a position shallower than the upper surface of the buried layer. A buried layer connection region of the second conductivity type electrically interconnects the first impurity diffusion region and the buried layer.
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