发明名称 |
Single-electron transistor and fabrication method thereof |
摘要 |
A method for fabricating a single-electron transistor (SET). A one dimensional channel is formed between source and drain on a silicon-on-insulator substrate, and the separated polysilicon sidewall spacer gates are formed by electron-beam lithographically etching process in a self-aligned manner. Operation of the single-electron transistor with self-aligned polysilicon sidewall spacer gates is achieved by applying external bias to the self-aligned polysilicon sidewall spacer gates to form two potential barriers and a quantum dot capable of storage charges between the two potential barriers. A metal upper gate is finally formed and biased to induce a two-dimensional electron gas (2DEG) and control the energy level of the quantum well. Accordingly, the method of the invention comprises a combination of electron beam (E-beam) lithography with multilayer-aligned direct writing technology, oxidation, and wet etching to form a nanoscale one-dimensional channel between source and drain on a silicon-on-insulator substrate.
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申请公布号 |
US6894352(B2) |
申请公布日期 |
2005.05.17 |
申请号 |
US20030602890 |
申请日期 |
2003.06.25 |
申请人 |
HU SHU-FEN;WU YUNG-CHUN;LU WEN-TAI;LIU SHIUE-SHIN;HUANG TIAO-YUAN;CHAO TIEN-SHENG |
发明人 |
HU SHU-FEN;WU YUNG-CHUN;LU WEN-TAI;LIU SHIUE-SHIN;HUANG TIAO-YUAN;CHAO TIEN-SHENG |
分类号 |
H01L21/335;H01L29/76;(IPC1-7):H01L27/01 |
主分类号 |
H01L21/335 |
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