发明名称 |
Method of forming strained silicon MOSFET having improved threshold voltage under the gate ends |
摘要 |
The formation of shallow trench isolations in a strained silicon MOSFET includes implantation of a dopant into overhang portions of the strained silicon layer and silicon germanium layer at the edges of trenches in which shallow trench isolations are to be formed. The conductivity type of the dopant is chosen to be opposite the conductivity type of the source and drain dopants. The implanted dopant increases the threshold voltage Vt beneath the ends of the gate in overhang portions of the strained silicon layer so that it is approximately equal to or greater than that of the remainder of the MOSFET. The resulting strained silicon MOSFET exhibits reduced leakage current beneath the ends of the gate.
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申请公布号 |
US6893929(B1) |
申请公布日期 |
2005.05.17 |
申请号 |
US20030641548 |
申请日期 |
2003.08.15 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
XIANG QI;LIN MING REN;NGO MINH V.;WANG HAIHONG |
分类号 |
H01L21/336;H01L21/762;H01L21/8234;H01L29/10;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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地址 |
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