发明名称 |
Timing generation circuit for display apparatus and display apparatus incorporating the same |
摘要 |
A timing generation circuit ( 15 ) is formed integrally on the same glass substrate ( 11 ) together with a display area section ( 12 ) similarly to an H driver ( 13 U) and a V driver ( 14 ), and timing pulses to be used by the H driver ( 13 U) and the V driver ( 14 ) are produced based on timing data produced by a shift register ( 31 U) of the H driver ( 13 U) and a shift register ( 14 A) of the V driver ( 14 ). The invention thereby provides a timing generation circuit which can contribute to miniaturization and reduction of the cost of the set and a display apparatus of the active matrix type in which the timing generation circuit is incorporated. |
申请公布号 |
US6894674(B2) |
申请公布日期 |
2005.05.17 |
申请号 |
US20020182600 |
申请日期 |
2002.07.31 |
申请人 |
SONY CORPORATION |
发明人 |
NAKAJIMA YOSHIHARU;MAKI YASUHITO;MAEKAWA TOSHIKAZU |
分类号 |
G09G3/20;G09G3/30;G09G3/36;(IPC1-7):G09G3/36;G09G5/00 |
主分类号 |
G09G3/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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