Schaltungsanordnung zur Realisierung logischer Funktionen,申请号CH19630001770-传众专利搜索

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发明名称	Schaltungsanordnung zur Realisierung logischer Funktionen
摘要
申请公布号	CH411994(A)	申请公布日期	1966.04.30
申请号	CH19630001770	申请日期	1963.02.13
申请人	SPERRY RAND CORPORATION	发明人	ELLIOTT SEAR,BRIAN
分类号	H03K3/33;H03K19/10	主分类号	H03K3/33
代理机构		代理人
主权项
地址

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