发明名称 |
Phase detector, clock distribution circuit, and LSI |
摘要 |
A phase detector includes a first selection circuit configured to select a first clock from a first group of clocks supplied to the first selection circuit and to transmit the first clock, and at least one phase comparator configured to detect a difference in phases between the first clock and a second clock supplied to the phase comparator and to transmit the difference as a scan signal.
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申请公布号 |
US2005099208(A1) |
申请公布日期 |
2005.05.12 |
申请号 |
US20040816808 |
申请日期 |
2004.04.05 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
ISHIHARA FUJIO |
分类号 |
G06F1/04;G06F1/10;G06F1/12;H03D13/00;H03K5/15;H03K5/26;H03L7/081;(IPC1-7):H03D3/00 |
主分类号 |
G06F1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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