发明名称 |
Multilevel register-file bit-read method and apparatus |
摘要 |
A bit-read apparatus includes a first decoder and N multiplexers, each having Q output nodes and Q pull-ups coupled thereto. Respective multiplexers have M selectors coupled to NxM respective select lines and register-file cells. The selectors are in Q groups coupled to respective output nodes. Each multiplexer has a logic gate with inputs coupled to respective multiplexer output nodes. A second decoder is coupled to an N+1th multiplexer having R output nodes and R pull-ups coupled thereto. The N+1th multiplexer also has N selectors, coupled to respective select lines of the second decoder and respective output logic gates of the N multiplexers. The N selectors are in R groups coupled to the R nodes. An output logic gate for N+1th multiplexer has R inputs coupled respectively to the R nodes. Each pull-up of the multiplexers drives its respective multiplexer output node responsive to an address-bit signal.
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申请公布号 |
US2005099851(A1) |
申请公布日期 |
2005.05.12 |
申请号 |
US20030703017 |
申请日期 |
2003.11.06 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHU SAM G.;KLIM PETER J.;LEE MICHAEL J.H.;PAREDES JOSE A. |
分类号 |
G11C7/10;G11C8/10;(IPC1-7):G11C7/00;G11C8/00 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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