发明名称 |
Bank command decoder in semiconductor memory device |
摘要 |
An apparatus, included in a semiconductor memory device, for generating a bank control signal, includes a logic block for receiving an internal precharge signal and a power-up signal and outputting a first signal; and a latch block for latching an internal active signal and the first signal in order to generate the bank control signal.
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申请公布号 |
US2005099853(A1) |
申请公布日期 |
2005.05.12 |
申请号 |
US20040877557 |
申请日期 |
2004.06.24 |
申请人 |
KIM CHEOL-KYU;GOU JA-SEUNG |
发明人 |
KIM CHEOL-KYU;GOU JA-SEUNG |
分类号 |
G11C7/00;G11C7/20;G11C8/12;(IPC1-7):G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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