发明名称 A HIGH RELIABILITY MEMORY MODULE WITH A FAULT TOLERANT ADDRESS AND COMMAND BUS
摘要 A high reliability dual inline memory module with a fault tolerant address and command bus for use in a server. The memory module is a card provided with a plurality of contacts of which some are redundant, a plurality of DRAMs, a phase lock loop, a 2 or 32K bit serial EE PROM and a 28 bit and a 1 to 2 register having error correction code (ECC), parity checking, a multi-byte fault reporting circuitry for reading via an independent bus, and real time error lines for determining and reporting both correctable errors and uncorrectable error conditions coupled to the server's memory interface chip and memory controller or processor such that the memory controller sends address and command information to the register via address/command lines together with check bits for error correction purposes to the ECC/ Parity register.
申请公布号 WO2004090723(A3) 申请公布日期 2005.05.12
申请号 WO2004GB01593 申请日期 2004.04.13
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION;IBM UNITED KINGDOM LIMITED;GOWER, KEVIN;HAZELZET, BRUCE;KELLOGG, MARK;PERLMAN, DAVID 发明人 GOWER, KEVIN;HAZELZET, BRUCE;KELLOGG, MARK;PERLMAN, DAVID
分类号 G01R31/28;G06F11/10;G11C29/00;H05K1/11 主分类号 G01R31/28
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