发明名称 METHOD AND APPARATUS FOR A VARIABLE PROCESSING PERIOD IN AN INTEGRATED CIRCUIT
摘要 The invention is a system for modifying the processing period in a digital logic module. The invention comprises the following. A processing circuit is configured to receive an input in order to create an output. A controller is coupled to the processing circuit and is configured to track L manipulations, wherein L is an integer. The controller is further configured to send a select signal to the processing circuit and to cause the processing circuit to manipulate the input over N clock cycles. N is an integer and N is less than or equal to L. N varies over the plurality of processing time periods. An output port is coupled to the processing circuit and is configured to convey the output.
申请公布号 WO2005043299(A2) 申请公布日期 2005.05.12
申请号 WO2004US34429 申请日期 2004.10.15
申请人 ATMEL CORPORATION;VERGNES, ALAIN 发明人 VERGNES, ALAIN
分类号 G06F 主分类号 G06F
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