发明名称 MULTIPLIER-DIVIDER CIRCUIT FOR A PFC CONTROLLER
摘要 The present invention introduces an integrated analog multiplier-divider circuit. The multiplier-divider block according to the present invention is ideal for use in the power factor correction (PFC) controllers of many switch-mode power supplies. The analog multiplier-divider according to the present invention is built from CMOS devices. Because of this, it has many advantages over prior-art multiplier-dividers. One important advantage is that the die-size and the cost can be reduced. Another important advantage of the multiplier-divider according to the present invention is substantially reduced temperature dependence.
申请公布号 WO2005043732(A1) 申请公布日期 2005.05.12
申请号 WO2004CN00545 申请日期 2004.05.26
申请人 SYSTEM GENERAL CORP.;YANG, TA-YUNG;LIN, SONG-YI;HSUEH, CHENG-CHI 发明人 YANG, TA-YUNG;LIN, SONG-YI;HSUEH, CHENG-CHI
分类号 G05F1/40;H02M1/00;H02M1/42 主分类号 G05F1/40
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