发明名称 |
Laminated chip varistor and production method thereof |
摘要 |
<p>A laminated chip varistor has a varistor element including at least one varistor layer and at least two inner electrodes which are laminated alternatively, and outer most layers comprising the same material as the varistor layer; and terminal electrodes electrically connected to the inner electrodes each formed at each of the both edge portions of the varistor element; wherein a surface roughness (R) of the varistor element is in the range of 0.60 to 0.90 mu m. <IMAGE></p> |
申请公布号 |
EP0858085(B1) |
申请公布日期 |
2005.05.11 |
申请号 |
EP19980101745 |
申请日期 |
1998.02.02 |
申请人 |
TDK CORPORATION |
发明人 |
OGASAWARA, TADASHI;MORI, KANEO;TANIGUCHI, MASAAKI;KONNO, MASAHIKO;MATSUOKA, DAI |
分类号 |
H01C7/00;H01C1/142;H01C7/10;H01C17/28;(IPC1-7):H01C7/18 |
主分类号 |
H01C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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