发明名称 Multiprocessor system having distributed shared memory and instruction scheduling method used in the same system
摘要 In multiprocessing system executing processing called NUMA prefetch, when a prefetch instruction is issued to a prefetch unit, an address converter converts an address specified by an operand of the instruction into a physical address. A prefetch type determiner determines whether the instruction is an NUMA prefetch instruction or a conventional perfect prefetch instruction. If the instruction is an NUMA prefetch instruction, an address determiner determines whether the physical address is a local address or a remote address. If the address is a local address, the processing of the prefetch instruction is terminated. If the address is a remote address, a cache tag checker checks a cache. When cache hit occurs, the processing is terminated. When cache mishit occurs, a prefetch request is issued to a main storage controller. As a result, data is prefetched from a remote main storage to a cache in a local main storage.
申请公布号 US6892280(B2) 申请公布日期 2005.05.10
申请号 US20020173105 申请日期 2002.06.18
申请人 HITACHI, LTD. 发明人 NAKAMURA TAKAKI
分类号 G06F9/38;G06F12/08;G06F15/167;(IPC1-7):G06F12/00 主分类号 G06F9/38
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