发明名称 |
Ring oscillator gates in a matrix for aberrant logic gate timing detection |
摘要 |
An array of circuitry forming row and column ring oscillators is provided to determine aberrant gates in an integrated circuit. Control logic is coupled to the rows and columns to enable a ring oscillator of either a row or a column to oscillate. Based on outputs of these oscillations, aberrant gates in an integrated circuit may be more readily studied.
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申请公布号 |
US6891442(B2) |
申请公布日期 |
2005.05.10 |
申请号 |
US20030610856 |
申请日期 |
2003.06.30 |
申请人 |
INTEL CORPORATION |
发明人 |
ALLEN ANDREW E.;SAMAAN SAMIE B.;SPENCER ROBERT M. |
分类号 |
H03B1/00;H03B27/00;H03K5/13;H03K17/04;H03K17/0412;H03K17/042;H03K17/16;(IPC1-7):H03B27/00 |
主分类号 |
H03B1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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