发明名称 EEPROM EMULATION IN FLASH MEMORY
摘要 An efficient emulation of EEPROM employing flash memory employs a fixed location for an address pointer in flash memory and such that an erase operation is required only once every nth update where n is the number of bits at the fixed location, thus avoiding the need to erase the sector on every update and avoiding delays associated with linked lists for determining the address of the most up-to-date information. Use of bit shifting provides fast determination of the desired address.
申请公布号 WO2005024842(B1) 申请公布日期 2005.05.06
申请号 WO2004US29202 申请日期 2004.09.08
申请人 BALLARD POWER SYSTEMS CORPORATION;NALLAPA, VENKATAPATHI, R. 发明人 NALLAPA, VENKATAPATHI, R.
分类号 G11C16/16;(IPC1-7):G11C16/16 主分类号 G11C16/16
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