发明名称 Integrated interconnect package
摘要 An integrated interconnect package for a semiconductor die and a method for assembling the die into the integrated interconnect package. The method may comprise placing the active face of the die onto an adhesive disposed on a sacrificial carrier, and applying an encapsulant over the backside of the die, forming a substantially rigid assembly structure. The assembly structure is separated from the adhesive, and an insulating material is applied to the active face of the die and patterned by a photolithography operation, creating at least one opening through the insulating material for exposing at least one die bond pad. A conductive material is then applied over the insulating material, flowing into the openings to contact the bond pads. The conductive material is then patterned by a photolithography operation, removing at least a portion of the conductive material to create a plurality of electrical traces and package terminals.
申请公布号 US2005093170(A1) 申请公布日期 2005.05.05
申请号 US20030695714 申请日期 2003.10.29
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 KALIDAS NAVINCHANDRA;LIBRES JEREMIAS
分类号 H01L21/60;H01L21/68;H01L23/498;H01L23/538;(IPC1-7):H01L21/44;H01L23/52 主分类号 H01L21/60
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