One mask high density capacitor for integrated circuits

摘要

An on-chip decoupling capacitor ( 106 ) and method of fabrication. The decoupling capacitor ( 104 ) is integrated at the top metal interconnect level ( 104 ) and may be implemented with only one additional masking layer. The decoupling capacitor ( 106 ) is formed on a copper interconnect line ( 104 a). An aluminum cap layer ( 118 ) provides electrical connection to the top electrode ( 112 ) of the decoupling capacitor ( 106 ).