发明名称 |
Semiconductor integrated circuit |
摘要 |
A semiconductor integrated circuit includes: a logic circuit to be tested; a memory connected the logic circuit to be tested; a BIST circuit for testing the memory; and a bypass circuit connected between the memory and the logic circuit and between the memory and the BIST circuit, the bypass circuit has a parallel test path for testing the logic circuit and the memory in parallel, and a signal line test path for testing non-tested signal lines in the parallel test path, and the bypass circuit selectively switches the parallel test path and the signal line test path.
|
申请公布号 |
US2005097418(A1) |
申请公布日期 |
2005.05.05 |
申请号 |
US20040894089 |
申请日期 |
2004.07.19 |
申请人 |
ANZOU KENICHI;TOKUNAGA CHIKAKO |
发明人 |
ANZOU KENICHI;TOKUNAGA CHIKAKO |
分类号 |
G01R31/28;G01R31/3185;G11C29/02;G11C29/12;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|