发明名称 Apparatus for calibrating the relative phase of two reception signals of a memory chip
摘要 A calibration apparatus is provided for adjusting the relative phase between two signals received at a memory chip, the two signals being generated such that they are synchronized with one another in a controller and are transmitted to the memory chip via separate lines. The calibration apparatus comprises a measuring device, which is arranged in the memory chip and is designed for measuring the relative phase between the two received signals, and a feedback loop containing a phase-controlling correction device. The measuring device is designed for generating an item of control information indicating the deviation of the measured relative phase from a defined tolerance range. The correction device responds to the control information to compensate for the deviation. The correction device is arranged in the controller and is designed for influencing the relative phase between the two signals to be transmitted to the memory chip. The feedback loop contains a signal connection leading from the memory chip to the controller.
申请公布号 US2005094462(A1) 申请公布日期 2005.05.05
申请号 US20040949793 申请日期 2004.09.24
申请人 JAKOBS ANDREAS 发明人 JAKOBS ANDREAS
分类号 G11C7/10;G11C7/22;G11C11/4076;(IPC1-7):G11C5/06 主分类号 G11C7/10
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