发明名称 Method and apparatus for testing an I/O buffer
摘要 A buffer circuit is provided having a driver device and an input device to receive a first set of signals and to produce a second set of signals. The driver device may receive the second set of signals and output a third set of signals based on the second set of signals input to said driver device. A comparing device may receive the third set of signals from the driver device and produce a fourth set of signals based on the third set of signals, the comparing device may compare the fourth set of signals with the first set of signals.
申请公布号 US6889350(B2) 申请公布日期 2005.05.03
申请号 US20010894007 申请日期 2001.06.29
申请人 INTEL CORPORATION 发明人 FOUGHT ERIC T.;BLODGETT CASS A.;KAKIZAWA AKIRA
分类号 G01R31/3181;G01R31/3187;(IPC1-7):G06F11/00 主分类号 G01R31/3181
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