发明名称 Layout structure and method for supporting two different package techniques of CPU
摘要 A layout structure of a central processing unit (CPU) that supports two different package techniques, comprising a motherboard that comprises the layout structure and a layout method. The layout structure of the preferred embodiment according to the present invention from up to down sequentially places a top signal layer, a grounded layer, a power layer having a grounded potential, and a bottom solder layer in the area where the signals of the CPU are coupled to the signals of the control chip, so that the signals that are placed on the bottom solder layer can refer to a grounded potential area of the power layer. Therefore, part of signals of the CPU that are coupled to the control chip can be placed on the bottom solder layer. Since the preferred embodiment of the present invention provides more flexibility in the placement design, a layout structure that supports the Pentium IV CPUs of different package techniques can be designed on the motherboard of the 4 layers stack structure, and these two CPUs can be supported by the same control chip.
申请公布号 US6888071(B2) 申请公布日期 2005.05.03
申请号 US20040710731 申请日期 2004.07.30
申请人 VIA TECHNOLOGIES, INC. 发明人 CHANG NAI-SHUNG;CHEN TSAI-SHENG;CHEN SHU-HUI
分类号 H05K1/00;H05K1/18;(IPC1-7):H05K1/03 主分类号 H05K1/00
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