发明名称 |
Method and apparatus for fast acknowledgement and efficient servicing of interrupt sources coupled to high latency paths |
摘要 |
A system and technique provides fast acknowledgement and servicing of interrupt sources coupled to a high latency path of an intermediate node of a computer network. An external device coupled to the high latency path is provided with a separate interrupt signal for each type of interrupt supported by a processor of the intermediate node. Each interrupt signal is directly fed to an interrupt multiplexing device over a first low latency path. The multiplexing device is accessible to the processor through a second low latency path. The external device asserts an interrupt by "pulsing" an appropriate interrupt signal to the multiplexing device. The multiplexing device maintains a current counter for each interrupt signal and increments that counter every time an interrupt pulse is detected. In addition to the counter, the multiplexing device maintains a status bit for each interrupt.
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申请公布号 |
US6889278(B1) |
申请公布日期 |
2005.05.03 |
申请号 |
US20010826271 |
申请日期 |
2001.04.04 |
申请人 |
CISCO TECHNOLOGY, INC. |
发明人 |
HOERLER JOHANNES MARKUS;SWEET, JR. FRANCIS W.;TURNER JOSEPH |
分类号 |
(IPC1-7):G08F13/24 |
主分类号 |
(IPC1-7):G08F13/24 |
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