| 摘要 |
A method of and apparatus for determining a defect-free semiconductor integrated circuit, such as a CMOS IC. The method includes a measurement step of selecting a defect-free CMOS integrated circuit (IC) from a group of CMOS integrated circuits by measuring quiescent power supply current (QPSC), a step of successively inspecting a test IC and the reference defect-free IC for resemblance for QPSCs, and a comparison and determination step of determining resemblance between QPSC data so that when the resemblance is high, the first and second ICs are determined to be defect-free ICs, and when the resemblance is low, the first and second ICs are determined to be defective ICs. The apparatus performs at least those steps.
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