| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device capable of reducing a chip area and reducing the parasitic inductance of wiring. SOLUTION: The semiconductor device comprises a p-type layer 13 formed on a p-type semiconductor substrate 11; a source region 14 formed in the surface region of the p-type layer 13; a drain region 15 formed separately from the source region 14; a reduced surface field layer 16 of a low density formed in the surface region of the p-type layer 13 between the source region 14 and the drain region 15 so as to be in contact with the drain region 15; a gate insulating film 17 formed on the p-type layer 13 between the source region 14 and the reduced surface field layer 16; a gate electrode 18 formed on the gate insulating film 17; a drain region 22 formed separately in a direction opposite to the gate electrode 18 from the drain region 15; and a Shottky electrode 23 formed on the p-type layer 13 between the drain region 15 and the drain region 22. COPYRIGHT: (C)2005,JPO&NCIPI |
