发明名称 |
ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT AND METHOD OF OPERATION |
摘要 |
<p>An ESD protection circuit (201) is for use with a high-voltage tolerant I/O circuit in an IC. This is accomplished by providing a small ESD diode (217) from the I/O pad to a relatively small boosted voltage bus (BOOST :BUS). The BOOST BUS is used to power a trigger circuit (203). This path has very little current flow during an ESD event due to minimal current dissipation in the trigger circuit. There is a diode drop but only very little IR voltage drop from the I/O pad to the trigger circuit (203). The trigger circuit (203) controls relatively large cascoded clamp NMOSFETs (207, 209). The net result is that a gate-to-source voltage (VGS) of both of the clamp NMOSFETs is increased thus increasing the conductivity of the cascoded clamp NMOSFETs (207, 209). This reduces the on-resistance of each of the NMOSFETS (207, 209), thereby improving the ESD performance, and reducing the layout area required to implement robust ESD protection circuits.</p> |
申请公布号 |
WO2005039011(A1) |
申请公布日期 |
2005.04.28 |
申请号 |
WO2004US31052 |
申请日期 |
2004.09.22 |
申请人 |
FREESCALE SEMICONDUCTOR, INC.;STOCKINGER, MICHAEL;MILLER, JAMES, W. |
发明人 |
STOCKINGER, MICHAEL;MILLER, JAMES, W. |
分类号 |
H01L27/02;H02H3/20;H02H3/22;H02H9/00;H02H9/04;(IPC1-7):H02H9/00 |
主分类号 |
H01L27/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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