Method and apparatus for computer-aided creation of a clock tree structure file, a method for computer-aided creation of a layout for a semiconductor circuit, and a computer-readable storage media

摘要

Method for computer-aided creation of a clock tree structure file for a semiconductor circuit, which has a plurality of synchronously driven switching elements and a plurality of signal connections. A first reference switching element is selected from the plurality of synchronously driven switching elements. A first reference arrival time of a clock signal is defined for the first reference switching element. A clock signal arrival interval is determined for at least one switching element from the plurality of synchronously driven switching elements, which is coupled to the first reference switching element via at least one of the plurality of signal connections. An arrival time of a clock signal for the at least one switching element within the clock signal arrival interval, whose value is not the same as the first reference arrival time, is defined. The first reference arrival time and the defined arrival time are stored in the clock tree structure file.