发明名称 Semiconductor integrated circuit having a function determination circuit
摘要 DC voltage V<SUB>REF </SUB>produced in an LSI and having a value between power supply voltage V<SUB>DD </SUB>and the ground potential is applied to the gate electrode of pMOS transistor Q<SUB>P1 </SUB>which forms a function determination circuit. Since the gate voltage of a transistor Q<SUB>P1 </SUB>is lower than that in a conventional function determination circuit, current through the transistor Q<SUB>P1 </SUB>is reduced. Hence, the gate length of the transistor Q<SUB>P1 </SUB>can be reduced. When a second pMOS transistor is connected in parallel to the transistor Q<SUB>P1 </SUB>so that the transistor has a function for supplying charge to junction A when power is fed to the LSI, the area of the transistor Q<SUB>P1 </SUB>can be further reduced. When a voltage produced for a purpose other than for the function determination circuit such as a step-down power supply of the LSI is used as DC voltage, the area of the transistor can be reduced.
申请公布号 US6885232(B2) 申请公布日期 2005.04.26
申请号 US19960696404 申请日期 1996.08.14
申请人 ELPIDA MEMORY, INC 发明人 CHONAN TORU
分类号 H01L27/04;H01L21/822;H01L23/50;H03K5/08;H03K5/153;(IPC1-7):H03K18/094 主分类号 H01L27/04
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