摘要 |
DC voltage V<SUB>REF </SUB>produced in an LSI and having a value between power supply voltage V<SUB>DD </SUB>and the ground potential is applied to the gate electrode of pMOS transistor Q<SUB>P1 </SUB>which forms a function determination circuit. Since the gate voltage of a transistor Q<SUB>P1 </SUB>is lower than that in a conventional function determination circuit, current through the transistor Q<SUB>P1 </SUB>is reduced. Hence, the gate length of the transistor Q<SUB>P1 </SUB>can be reduced. When a second pMOS transistor is connected in parallel to the transistor Q<SUB>P1 </SUB>so that the transistor has a function for supplying charge to junction A when power is fed to the LSI, the area of the transistor Q<SUB>P1 </SUB>can be further reduced. When a voltage produced for a purpose other than for the function determination circuit such as a step-down power supply of the LSI is used as DC voltage, the area of the transistor can be reduced. |