发明名称 Bit rate converter with controlled stuffing rate
摘要 A bit rate converter capable of avoiding slip of data in a memory for use in bit rate adjustment is disclosed. A phase comparator compares a write address and a read address of the memory to produce a phase difference. The write address is ahead of the read address in the memory. A stuffing rate controller selects one of a plurality of preset fixed stuffing rates depending on the phase difference. A stuff pulse inserter inserts a stuff pulse into readout data from the memory at the selected stuffing rate. When normally operating, a normal fixed stuffing rate is selected. When the phase difference is small than a lowest threshold value, a higher fixed stuffing rate is selected. When the phase difference is greater than a highest threshold value, a lower fixed stuffing rate is selected.
申请公布号 US6885681(B2) 申请公布日期 2005.04.26
申请号 US20010798939 申请日期 2001.03.06
申请人 NEC CORPORATION 发明人 TANAKA HIROAKI;NOMURA KENICHI;HARA YASUSHI
分类号 H04J3/06;H04J3/07;H04L7/00;H04L13/08;H04L25/05;(IPC1-7):H04J3/06 主分类号 H04J3/06
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