发明名称 High speed methods for maintaining a summary of thread activity for multiprocessor computer systems
摘要 A high-speed method for maintaining a summary of thread activity reduces the number of remote-memory operations for an n processor, multiple node computer system from n<SUP>2 </SUP>to (2n-1) operations. The method uses a hierarchical summary of-thread-activity data structure that includes structures such as first and second level bit masks. The first level bit mask is accessible to all nodes and contains a bit per node, the bit indicating whether the corresponding node contains a processor that has not yet passed through a quiescent state. The second level bit mask is local to each node and contains a bit per processor per node, the bit indicating whether the corresponding processor has not yet passed through a quiescent state. The method includes determining from a data structure on the processor's node (such as a second level bitmask) if the processor has passed through a quiescent state. If so, it is then determined from the data structure if all other processors on its node have passed through a quiescent state. If so, it is then indicated in a data structure accessible to all nodes (such as the first level bitmask) that all processors on the processor's node have passed through a quiescent state. The local generation number can also be stored in the data structure accessible to all nodes. If a processor determines from this data structure that the processor is the last processor to pass through a quiescent state, the processor updates the data structure for storing a number of the current generation stored in the memory of each node.
申请公布号 US6886162(B1) 申请公布日期 2005.04.26
申请号 US19980127085 申请日期 1998.07.31
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 MCKENNEY PAUL E.
分类号 G06F9/00;(IPC1-7):G06F9/00 主分类号 G06F9/00
代理机构 代理人
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