| 摘要 |
PROBLEM TO BE SOLVED: To provide a frame memory circuit that can realize two tradeoff functions of reading a single line at high speed and of reading a plurality of lines simultaneously, without using a line memory or the like. SOLUTION: The frame memory circuit comprises a DRAM control part for generating a command sequence and an address to a DRAM to write an input video signal into the DRAM and read video signal data from the DRAM. The DRAM control part generates both a command sequence used to read a single line of pixel data at high speed and command sequences used to read a plurality of lines of pixel data simultaneously, and switches them to control access to the DRAM. COPYRIGHT: (C)2005,JPO&NCIPI
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