| 摘要 |
<p>The invention relates to a comparison circuit for an analog/digital converter. In order to reduce the effect of offset voltages from the different comparators of the comparison circuit, the invention comprises the downstream connection of the outputs (O) of the comparators (C), voltage followers (A) and a resistor network (2), said network (2) delivering as output (O', O´) the average voltages of those present at the outputs (O, O) of the comparators (C).</p> |
