| 摘要 |
A semiconductor integrated circuit comprises a plurality of memory cell blocks each including a comparing cell which detects a current level and data cells which store data therein, a plurality of reference voltage determining circuits each of which determines a second reference voltage in accordance with a first reference voltage and the output of the comparing cell, and amplifiers each of which compares the data stored in the data cell and the output of the reference voltage determining circuit and amplifies the result of comparison. The outputs of the comparing cells are short-circuited in a predetermined combination. Owing to the configuration of the semiconductor integrated circuit, misdetection of each reading cell due to process variations related to each individual comparing cell can be prevented and yield enhancement can be achieved. Further, such a configuration leads to a cost reduction.
|
