发明名称 FIELD PROGRAMMABLE GATE ARRAY
摘要 PROBLEM TO BE SOLVED: To provide an FPGA for realizing space-saving of an FeRAM incorporated in the FPGA and the high density of the mounting. SOLUTION: The FeRAM is comprised of a plurality of memory cells M00-Mnn. The memory cell M00 is comprised of an SRAM 4 and the FeRAMs 5-0 to 5-n. The SRAM 4 is comprised of inverters 6, 7 and MOS transistors 8, 9. The FeRAMs 5-0 to 5-n are comprised of only ferroelectric capacitors CO1, CO2. By this, the FeRAMs 5-0 to 5-n do not include a transistor. Accordingly, the space-saving of the FeRAM can be realized and also the high density of the mounting can be realized. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005109960(A) 申请公布日期 2005.04.21
申请号 JP20030341611 申请日期 2003.09.30
申请人 SEIKO EPSON CORP 发明人 KONO SHIGEAKI
分类号 H01L21/82;H03K19/173;(IPC1-7):H03K19/173 主分类号 H01L21/82
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