System & method for performing design rule check

摘要

An improved system and method is disclosed for performing a design rule check on a proposed integrated circuit (IC) layout, and for creating customized design rule check command files. The individual layers of the IC (a system on chip-SOC) are separated into different regions having different kinds of features (i.e., memory or logic). Each different type of region is then analyzed in accordance with the customized design rule command file so that so-called "false errors" are eliminated. The invention thus improves, among other things, a development time for getting a design implemented in silicon.