| 摘要 |
PROBLEM TO BE SOLVED: To provide an instruction execution method using a high performance RISC-based superscalar processor suitable for realizing by a microprocessor. SOLUTION: The microprocessor fetches, interprets and executes an instruction set from an instruction store. It is provided with an instruction set acquisition means for obtaining a predetermined instruction set to be executed including an instruction for referring to a register, a data storage means for storing data in a plurality of registers including the predetermined register and a temporary register and an execution means which is combined with the instruction set acquisition means, the means for sequentially executing the predetermined instruction set, instructing storage of data processed by out-of-order instruction execution in the temporary register and in which the register to be referred to by the out-of-order instruction execution is the predetermined register. COPYRIGHT: (C)2005,JPO&NCIPI
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