Method for forming CMOS semiconductor devices having a notched gate insulator and devices thus obtained

摘要

The present invention relates to a method of providing a semiconductor device with a control electrode structure having a controlled overlap between control electrode (3) and first and second main electrode extensions (4, 5), but without a need to use many spacers. Thereto, the method provides a step of etching back an insulating layer (2). This is performed after amorphizing and implanting the main electrode extensions (4, 5), because the step that amorphizes the extensions (4, 5) also partly amorphizes the insulating layer (2). Since etch rates of amorphous insulator and crystalline insulator differ, this may serve as a natural etch stop to enable even better fine-tuning of the overlap. A corresponding semiconductor device is also provided.