发明名称 Metal-insulator-metal (MIM) capacitor structure in copper-CMOS circuits using a pad protect layer
摘要 A metal-insulator-metal (MIM) capacitor structure and method of fabrication for CMOS circuits having copper interconnections are described. The method provides metal capacitors with high figure of merit Q (X<SUB>c</SUB>/R) and which does not require additional masks and metal layers. The method forms a copper capacitor bottom metal (CBM) electrode while concurrently forming the pad contacts and level of copper interconnections by the damascene process. An insulating (Si<SUB>3</SUB>N<SUB>4</SUB>) metal protect layer is formed on the copper and a capacitor interelectrode dielectric layer is formed. A metal protecting buffer is used to protect the thin interelectrode layer, and openings are etched to pad contacts and interconnecting lines. A TiN/AlCu/TiN metal layer is deposited and patterned to form the capacitor top metal (CTM) electrodes, the next level of interconnections, and to provide a pad protect layer on the copper pad contacts. The thick TiN/AlCu/TiN CTM electrode reduces the capacitor series resistance and improves the capacitor figure of merit Q, while the pad protect layer protects the copper from corrosion.
申请公布号 US6881996(B2) 申请公布日期 2005.04.19
申请号 US20040935376 申请日期 2004.09.07
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 CHEN CHUN-HON;MA SSU-PIN;YEH TA-HSUN;HO YEN-SHIH;PENG KUO-REAY;HSU HENG-MING;THEI KONG-BENG;CHOU CHI-WU
分类号 H01L21/02;H01L21/8238;H01L21/8242;H01L23/522;H01L27/08;H01L27/108;H01L29/76;H01L31/119;(IPC1-7):H01L27/108 主分类号 H01L21/02
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