| 摘要 |
The present invention provides a data processing apparatus and method for handling of coprocessor instructions. The apparatus comprises a processor core for processing a sequence of data processing instructions, and a plurality of coprocessors for executing coprocessor instructions provided within the sequence of data processing instructions. Each coprocessor instruction has a virtual coprocessor number associated therewith for use in identifying which of the plurality of coprocessors is to execute that coprocessor instruction. For each coprocessor instruction with its associated virtual coprocessor number, there are multiple coprocessors within the plurality that may execute that coprocessor instruction, and a coprocessor determination logic is provided to determine for each virtual coprocessor number, based on a mapping, which coprocessor is assigned that virtual coprocessor number, and hence will execute instructions associated with that virtual coprocessor number. Further, in preferred embodiments, the processor core is able to invoke a change in the mapping so as to alter for any virtual coprocessor number the coprocessor that is assigned that virtual coprocessor number, and hence is responsible for executing coprocessor instructions having that virtual coprocessor number associated therewith. This approach provides a very flexible technique for dynamically allocating virtual coprocessor numbers to coprocessors at any appropriate point during execution of the instructions on the processor core, for example upon a task switch.
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