发明名称 |
Interconnection substrate and fabrication method thereof |
摘要 |
An interconnection substrate include: interconnection layer 12 region where at least first conductor layer 16 and second conductor layer 18 are vertically stacked in that order on substrate 10, first conductor layer 16 and second conductor layer 18 containing conductive particles and a binder, wherein first conductor layer 16 and second conductor layer 18 stacked in the interconnection layer 12 region have conductive particles different in average particle size from each other. As a result, only intended region can have low resistance.
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申请公布号 |
US2005079707(A1) |
申请公布日期 |
2005.04.14 |
申请号 |
US20040947177 |
申请日期 |
2004.09.23 |
申请人 |
TSUKAHARA NORIHITO;NISHIKAWA KAZUHIRO;SAKURAI DAISUKE |
发明人 |
TSUKAHARA NORIHITO;NISHIKAWA KAZUHIRO;SAKURAI DAISUKE |
分类号 |
H05K1/09;H01B5/14;H05K3/12;H05K3/24;(IPC1-7):H01L21/00;H01L21/84;H01L21/476 |
主分类号 |
H05K1/09 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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