| 摘要 |
PROBLEM TO BE SOLVED: To improve a gate yield by inhibiting the generation of irregularities in the surface of a gate electrode in the formation process of the gate electrode containing a polycrystalline SiGe layer. SOLUTION: A disclosed manufacturing method for a semiconductor device includes a first film forming process in which an amorphous SiGe layer 8 is formed on a gate Si oxide film 5 at a film forming temperature of 450 to 550°C, and a second film forming process in which an amorphous Si layer 9 as a first Si cap layer is formed on the SiGe layer 8 at a temperature lower than the film forming temperature of 450 to 550°C. The manufacturing method for the semiconductor device further includes a third film forming process in which the temperature is increased at 590 to 610°C where the Si layer 9 is not crystallized, and the layer SiGe 8 is crystallized at the temperature while a polycrystalline Si layer 10 as a second Si cap layer is formed on the Si layer 9. COPYRIGHT: (C)2005,JPO&NCIPI
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