发明名称 LAMINATED SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the size of a laminated semiconductor integrated circuit and also to increase the signal transmitting speeds between semiconductor chips and between the semiconductor chips and a substrate. SOLUTION: First and second semiconductor chips 2 and 3 are arranged with their element surfaces 21 and 31 on a substrate 1 side. Through holes 23 are formed in the first semiconductor chip 2, and wiring 7 is formed on the surface 25 of the chip 2 on the side opposite to the element surface 21. The wiring 7 and bumps 51 formed on the element surface 21 are connected to each other through a conductive material 6 packed in the through holes 23. In addition, the first semiconductor chip 2 and the substrate 1 are connected to each other through the bumps 51 and electrodes 11. Moreover, the first and second semiconductor chips 2 and 3 are connected to each other through the wiring 7 of the first semiconductor chip 2 and bumps 53 formed on the element surface 31 of the second semiconductor chip 3. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005101186(A) 申请公布日期 2005.04.14
申请号 JP20030331667 申请日期 2003.09.24
申请人 SEIKO EPSON CORP 发明人 YAMAGUCHI KOJI
分类号 H01L25/18;H01L25/065;H01L25/07;(IPC1-7):H01L25/065 主分类号 H01L25/18
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