发明名称 Power saving zero pruning algorithm for fast fourier transform (FFT) circuitry
摘要 A fast Fourier transform (FFT) circuit from which unneeded butterfly computation modules can be effectively pruned for specific applications. Each module that is not needed is pruned by injecting zero signals into it, thereby minimizing the power dissipated in the pruned circuit. A multiplexer integrated into each butterfly module output (or input) line allows the line signal to be either forced to zero or allowed to carry a nonzero signal.
申请公布号 US2005080833(A1) 申请公布日期 2005.04.14
申请号 US20030682622 申请日期 2003.10.09
申请人 SMITH RONALD P. 发明人 SMITH RONALD P.
分类号 G06F15/00;G06F17/14;(IPC1-7):G06F15/00 主分类号 G06F15/00
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